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L8A-64-TQ128

Codec

CS427

11.289

6 MHz

Crystal

24.576 MHz

Crystal

MCLK

BCLK

LRCLK

SDIN

SDOUT

MCLK_SEL

Figure 27:

Audio Clock

Connections

The CODEC has three internal modes depending on the sampling rate used. These

change the oversampling ratio used internally in the CODEC. The three modes are

shown below:

CODEC mode CODEC sample rate range (kHz)

Single-Speed 4-54

Double-Speed 50-108

Quad-Speed 100-216

Figure 28:

CODEC

Modes

In stand-alone mode, the CODEC automatically determines which mode to operate

in based on input clock rates.

The internal master clock dividers are set using the MDIV pins. MDIV is tied low

and MDIV2 is connected to bit 2 of port 32A (as well as to the master clock select).

With MDIV2 low, the master clock must be 256Fs in single-speed mode, 128Fs in

double-speed mode and 64Fs in quad-speed mode. This allows an 11.2896MHz

master clock to be used for sample rates of 44.1, 88.2 and 176.4kHz.

With MDIV2 high, the master clock must be 512Fs in single-speed mode, 256Fs

in double-speed mode and 128Fs in quad-speed mode. This allows a 24.576MHz

master clock to be used for sample rates of 48, 96 and 192kHz.

When changing sample frequency, the CodecConﬁg() function ﬁrst puts the CODEC

into reset by setting P32A[1] low. It selects the required master clock/CODEC

dividers and keeps the CODEC in reset for 1ms to allow the clocks to stabilize. The

CODEC is brought out of reset by setting P32A[1] back high.

REV 6.1

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Request AudioReQuest N.Series Manual Pagina 34